A display device includes, for example, a plurality of display elements such as transistors formed in a display region. An image is displayed in such a display device by transmitting a signal to the plurality of display elements to drive the display elements. A large number of signal lines are required to transmit the signal to the plurality of display elements. The number of signal lines increases as definition of a display image becomes higher.
In addition, a technique of reducing the area of a part called a peripheral region or a frame region, which is a non-display part surrounding the perimeter of the display region, has been requested for the display device. A lead-out line which is connected to the signal line and supplies a signal to the signal line is formed in the frame region. In other words, it is necessary to efficiently lay out a large number of the lead-out lines in the frame region in order to improve the performance of the display device.
For this purpose, a technique of efficiently laying out the large number of lead-out lines in a frame region by distributing the large number of lead-out lines to a plurality of wiring layers laminated with an insulating film interposed therebetween has been known. For example, Japanese Patent Application Laid-Open Publication No. 2004-53702 (Patent Document 1) describes a technique of forming a plurality of gate connecting lines, which are connected to a plurality of gate lines formed in a pixel region, in a plurality of wiring layers. In addition, Japanese Patent Application Laid-Open Publication No. 2011-123162 (Patent Document 2) describes a technique of forming wirings, which are connected to a thin-film transistor for inspection, in a plurality of wiring layers.